/* SPDX-License-Identifier: GPL-2.0 */


#ifndef __SOC_QCOM_TCS_H__
#define __SOC_QCOM_TCS_H__

#include <linux/bitfield.h>
#include <linux/bits.h>

#define MAX_RPMH_PAYLOAD	16


enum rpmh_state {
	RPMH_SLEEP_STATE,
	RPMH_WAKE_ONLY_STATE,
	RPMH_ACTIVE_ONLY_STATE,
};


struct tcs_cmd {
	u32 addr;
	u32 data;
	u32 wait;
};


struct tcs_request {
	enum rpmh_state state;
	u32 wait_for_compl;
	u32 num_cmds;
	struct tcs_cmd *cmds;
};

#define BCM_TCS_CMD_COMMIT_MASK		BIT(30)
#define BCM_TCS_CMD_VALID_MASK		BIT(29)
#define BCM_TCS_CMD_VOTE_MASK		GENMASK(13, 0)
#define BCM_TCS_CMD_VOTE_Y_MASK		GENMASK(13, 0)
#define BCM_TCS_CMD_VOTE_X_MASK		GENMASK(27, 14)


#define BCM_TCS_CMD(commit, valid, vote_x, vote_y)		\
	(u32_encode_bits(commit, BCM_TCS_CMD_COMMIT_MASK) |	\
	u32_encode_bits(valid, BCM_TCS_CMD_VALID_MASK) |	\
	u32_encode_bits(vote_x, BCM_TCS_CMD_VOTE_X_MASK) |	\
	u32_encode_bits(vote_y, BCM_TCS_CMD_VOTE_Y_MASK))

#endif 
